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Dead-time optimization for SiC based voltage source converters using online condition monitoring...

Publication Type
Conference Paper
Journal Name
IEEE Xplore
Publication Date
Page Numbers
15 to 19
Volume
0
Issue
0
Conference Name
IEEE Workshop on Wide Bandgap Devices and Applications
Conference Location
Albuquerque, New Mexico, United States of America
Conference Sponsor
IEEE
Conference Date
-

This paper introduces a dead-time optimization technique for a 2-level voltage source converter (VSC) using turn-off transition monitoring. Dead-time in a VSC impacts power quality, reliability, and efficiency. Silicon carbide (SiC) based VSCs are more sensitive to dead-time from increased reverse conduction losses and turn-off time variability with operating conditions and load characteristics. An online condition monitoring system for SiC devices has been developed using gate drive assist circuits and a micro-controller. It can be leveraged to monitor turn-off time and indicate the optimal dead-time in each switching cycle of any converter operation. It can also be used to specify load current polarity, which is needed for dead-time optimization in an inverter. This is an important distinction from other inverter dead-time elimination/optimization schemes as current around the zero current crossing is hard to accurately detect. A 1kW half-bridge inverter was assembled to test the turn-off time monitoring and dead-time optimization scheme. Results show 91% reduction in reverse conduction power losses in the SiC devices compared to a set dead-time of 500ns switching at 50 kHz.