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TISCC: A Surface Code Compiler and Resource Estimator for Trapped-Ion Processors...

by Tyler R Leblond, Ryan S Bennink, Justin G Lietz, Christopher M Seck
Publication Type
Conference Paper
Book Title
SC-W '23: Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis
Publication Date
Page Numbers
1426 to 1435
Publisher Location
New York, New York, United States of America
Conference Name
SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis
Conference Location
Denver, Colorado, United States of America
Conference Sponsor
SIGHPC
Conference Date

We introduce the Trapped-Ion Surface Code Compiler (TISCC), a software tool that generates circuits for a universal set of surface code patch operations in terms of a native trapped-ion gate set. To accomplish this, TISCC manages an internal representation of a trapped-ion system where a repeating pattern of trapping zones and junctions is arranged in an arbitrarily large rectangular grid. Surface code operations are compiled by instantiating surface code patches on the grid and using methods to generate transversal operations over data qubits, rounds of error correction over stabilizer plaquettes, and/or lattice surgery operations between neighboring patches. Beyond the implementation of a basic surface code instruction set, TISCC contains corner movement functionality and a patch translation that is implemented using ion movement alone. Except in the latter case, all TISCC functionality is extensible to alternative grid-like hardware architectures. TISCC output has been verified using the Oak Ridge Quasi-Clifford Simulator (ORQCS).