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An FPGA-Based Neuromorphic Processor with All-to-All Connectivity

Publication Type
Conference Paper
Book Title
2023 IEEE International Conference on Rebooting Computing (ICRC)
Publication Date
Page Numbers
1 to 5
Publisher Location
New Jersey, United States of America
Conference Name
2023 IEEE International Conference on Rebooting Computing (ICRC)
Conference Location
San Diego, California, United States of America
Conference Sponsor
IEEE
Conference Date
-

Neuromorphic computing is a promising paradigm for future energy-efficient computing. At present, however, it is in its nascent stages—most hardware implementations are research-grade, commercial products are not available, and the software tools are not production-ready. The lack of hardware and software tools makes neuromorphic computing inaccessible to researchers around the globe. To this extent, we intend to build a low-cost, open-source, FPGA-based digital neuromorphic processor that can be used by researchers worldwide. In this paper, we present a preliminary implementation of the processor on a Xilinx Artix-7 FPGA using SystemVerilog. Our implementation supports the integrate-and-fire neuron with two parameters each for neurons and synapses. It also features all-to-all connectivity among neurons on the hardware. We test our implementation on four cases: bars and stripes datasets, shortest path algorithm, logic gates, and 8-3 encoder. We also perform a scalability study to understand the resource utilization of the FPGA as the number of all-to-all connected neurons increases. With our implementation, the Artix- 7 supports 65 neurons with all-to-all connectivity. Moreover, all the test cases mentioned above achieve 100% accuracy.