March 2026

Conference Paper

Scaling the memory wall using mixed-precision – HPG-MxP on an exascale-class machine

By:
Kashi, Aditya ; Koukpaizan, Nicholson K; Lu, Hao ; Matheson, Michael A; Oral, Hakki S; Wang, Feiyi
Page Number:
281-297
Book Title:
Proceedings of the 2025 International Conference for High Performance Computing, Networking, Storage and Analysis (SC'25)
Publication Date:
March 12, 2026
Publisher Location:
Association of Computing Machinery, New York, New York, United States of America
Conference Name:
2025 International Conference for High Performance Computing, Networking, Storage, and Analysis (SC '25)
Conference Location:
St. Louis, Missouri, United States of America
Conference Sponsor:
ACM, SigHPC, IEEE, TCHPC
View DOI Listing:
https://doi.org/10.1145/3712285.375987

Abstract

Mixed-precision algorithms have been proposed as a way for scientific computing to benefit from some of the gains seen for AI on recent high performance computing (HPC) platforms. A few applications dominated by dense matrix operations have seen substantial speedups by utilizing low precision formats such as FP16. However, a majority of scientific simulation applications are memory bandwidth limited. Beyond preliminary studies, the practical gain from using mixed-precision algorithms on a given high-performance computing (HPC) system is largely unclear. The High Performance GMRES Mixed Precision (HPG-MxP) benchmark has been proposed to measure the useful performance of a HPC system on sparse matrix-based mixed-precision applications. In this work, we present an implementation of the HPG-MxP benchmark for an exascale system and describe our algorithm enhancements. We show for the first time a speedup of 1.6x using a combination of double- and single-precision keeping the same residual level on modern GPU-based supercomputers.