December 2018

Conference Paper

Optimizing the Fast Fourier Transform Using Mixed Precision on Tensor Core Hardware

By:
Sorna, Anumeena; Cheng, Xiaohe; D'azevedo, Eduardo F; Wong, Kwai L; Tomov, Stanimire
Page Number:
3-7
Book Title:
2018 IEEE 25th International Conference on High Performance Computing Workshops (HiPCW)
Publication Date:
December 2018
Conference Name:
Paralle Fast Fourier Transforms (PFFT18)
Conference Location:
Bengaluru, India
Conference Sponsor:
IEEE Computer Society, HiPC, ACM
View DOI Listing:
https://doi.org/10.1109/HiPCW.2018.8634417

Abstract

The Fast Fourier Transform is a fundamental tool in scientific and technical computation. The highly parallelizable nature of the algorithm makes it a suitable candidate for GPU acceleration. This paper focuses on exploiting the speedup due to using the half precision multiplication capability of the latest GPUs' tensor core hardware without significantly degrading the precision of the Fourier Transform result. We develop an algorithm that dynamically splits the input single precision dataset into two half precision sets at the lowest level, uses half precision multiplication, and recombines the result at a later step. This work paves the way for using tensor cores for high precision inputs.