January 2012

Conference Paper

Enabling Next-Generation Parallel Circuit Simulation with Trilinos

By:
Baker, Christopher G; Heroux, Michael; Boman, Eric; Thornquist, Heidi; Keiter, Eric; Schiek, Rich; Rajamanickam, Siva
Page Number:
315-323
Volume:
1
Book Title:
Euro-Par 2011 Workshops
Publication Date:
January 2012
Publisher Location:
Springer-Verlag, Heidelberg, Germany
Conference Name:
Euro-Par 2011
Conference Location:
Bordeaux, France
Conference Sponsor:
INRIA
View DOI Listing:
https://doi.org/10.1007/978-3-642-29737-3_36

Abstract

TheXyceParallelCircuitSimulator,whichhasdemonstrated scalable circuit simulation on hundreds of processors, heavily leverages the high-performance scientific libraries provided by Trilinos. With the move towards multi-core CPUs and GPU technology, retaining this scal- ability on future parallel architectures will be a challenge. This paper will discuss how Trilinos is an enabling technology that will optimize the trade-off between effort and impact for application codes, like Xyce, in their transition to becoming next-generation simulation tools.