August 2024

Conference Paper

The Case for Co-Designing Model Architectures with Hardware

By:
Yin, Junqi ; Anthony, Quentin; Hatef, Jacob; Narayanan, Deepak; Biderman, Stella; Bekman, Stas; Shaf, Aamir; Subramoni, Hari; Panda, Dhabaleswar
Page Number:
84-96
Book Title:
ICPP '24: Proceedings of the 53rd International Conference on Parallel Processing
Publication Date:
August 2024
Publisher Location:
Association for Computing Machinery, New York, New York, United States of America
Conference Name:
The 53rd International Conference on Parallel Processing (ICPP)
Conference Location:
Gotland, Sweden
Conference Sponsor:
ACM
View DOI Listing:
https://doi.org/10.1145/3673038.3673136

Abstract

While GPUs are responsible for training the vast majority of state-of-the-art deep learning models, the implications of their architecture are often overlooked when designing new deep learning (DL) models. As a consequence, modifying a DL model to be more amenable to the target hardware can significantly improve the runtime performance of DL training and inference. In this paper, we provide a set of guidelines for users to maximize the runtime performance of their transformer models. These guidelines have been created by carefully considering the impact of various model hyperparameters controlling model shape on the efficiency of the underlying computation kernels executed on the GPU. We find the throughput of models with “efficient” model shapes is up to 39% higher while preserving accuracy compared to models with a similar number of parameters but with unoptimized shapes.


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