December 2012

Conference Paper

A Clock Synchronization Strategy for Minimizing Clock Variance at Runtime in High-end Computing Environments

By:
Jones, Terry R; Koenig, Gregory A
Publication Date:
December 2012
Conference Name:
SBAC PAD 2010
Conference Location:
Rio de Janeiro, Brazil
Conference Sponsor:
IEEE

Abstract

We present a new software-based clock synchronization scheme designed to provide high precision time agreement among distributed memory nodes. The technique is designed to minimize variance from a reference chimer during runtime and with minimal time-request latency. Our scheme permits initial unbounded variations in time and corrects both slow and fast chimers (clock skew). An implementation developed within the context of the MPI message passing interface is described and time coordination measurements are presented. Among our results, the mean time variance among a set of nodes improved from 20.0 milliseconds under standard Network Time Protocol (NTP) to 2.29 μsecs under our scheme.


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