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QASMTrans: A QASM Quantum Transpiler Framework for NISQ Devices

Publication Type
Conference Paper
Book Title
SC-W '23: Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis
Publication Date
Page Numbers
1468 to 1477
Publisher Location
New York, New York, United States of America
Conference Name
The International Conference on High Performance Computing, Network, Storage, and Analysis (SC-W)
Conference Location
Denver, Colorado, United States of America
Conference Sponsor
Conference Date

The success of a quantum algorithm hinges on the ability to orchestrate a successful application induction. Detrimental overheads in mapping general quantum circuits to physically implementable routines can be the deciding factor between a successful and erroneous circuit induction. In QASMTrans, we focus on the problem of rapid circuit transpilation. Transpilation plays a crucial role in converting high-level, machine-agnostic circuits into machine-specific circuits constrained by physical topology and supported gate sets. The efficiency of transpilation continues to be a substantial bottleneck, especially when dealing with larger circuits requiring high degrees of inter-qubit interaction. QASMTrans is a high-performance C++ quantum transpiler framework that demonstrates 3-1111 × speedups compared to the commonly used Qiskit transpiler. We observe speedups on large dense circuits such as ‘uccsd_n24’ which require gates. QASMTrans successfully transpiles the aforementioned circuits in 7.9s, whilst Qiskit needs 502 seconds with optimization 1 and exceeds an hour of transpilation time with optimization 3. With QASMTrans providing transpiled circuits in a fraction of the time of prior transpilers, potential design space exploration, and heuristic-based transpiler design becomes substantially more tractable. QASMTrans is released at