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ORNL-developed cryogenic memory cell circuit designs fabricated onto these small chips by SeeQC, a superconducting technology company, successfully demonstrated read, write and reset memory functions. Credit: Carlos Jones/Oak Ridge National Laboratory, U.S. Dept. of Energy

Scientists at have experimentally demonstrated a novel cryogenic, or low temperature, memory cell circuit design based on coupled arrays of Josephson junctions, a technology that may be faster and more energy efficient than existing memory devices.