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M. Parans Paranthaman

Distringuished Research Staff and Group Leader

Ph.D. Materials Science/Solid State Chemistry, Indian Institute of Technology, Madras, 1988
Research Staff Member, Oak Ridge National Laboratory, 1993-Present
Acting Group Leader, Materials Chemistry Group, Oak Ridge National Laboratory, 2006-Present

Research Interests:

Investigation of how structure and dynamics on the nanometer scale impacts
    the physical, chemical, and optoelectronic properties of materials
 Development of coated conductors using vacuum and non-vacuum
    processing techniques
 Materials synthesis and characterization of high-temperature superconductors.
 Synthesis of nanoparticles and template synthesis of nanostructures
 Thin Film Flexible Solar Cells
 Energy storage

Professional Societies:

 Fellow: Institute of Physics, London, UK (2004)
 Member: Materials Research Society, 1993-present
 Member: American Ceramic Society 1999-present
 Member: ASM International, The Materials Information Society, 2002-present
 Member: American Association for the Advancement of Science (AAAS),
    2004-present
 Member: Electrochemical Society 2008-present
 Associate Editor, Journal of the American Ceramic Society    (2004-Present)
 Editorial Board, The Open Applied Physics Journal     (2008-Present)
 Editorial Board, Superconductor Science and Technology    (2003-2008)

Selected Publications (Total > 275):

  1. Paranthaman, M. Parans, M. S. Bhuiyan, S. Sathyamurthy, L. Heatherly, C. Cantoni, and A. Goyal, "Improved textured La2Zr2O7 buffer on La3TaO7 seed for all-MOD Buffer/YBCO coated conductors," Physica C, 468, 1587-1590 (2008).
  2. Gu, Zhanjun, M. Parans Paranthaman, Jun Xu, and Zheng Wei Pan, "Aligned Zinc Oxide Nanorod Arrays Grown Directly on Zinc Foils and Zinc Microspheres by a Low-Temperature Oxidation Method," ACS Nano (2009).
  3. Gu, Zhanjun, M. Parans Paranthaman, and Zhengwei Pan, "Vapor-Phase Synthesis of Gallium Phosphide Nanowires," Crystal Growth & Design, 9 (1) 525-527 (2009).
  4. Pan, Zheng Wei, John D. Budai, Zu Rong Dai, Wenjun Liu, M. Parans Paranthaman, and Sheng Dai, "Zinc Oxide Microtowers by Vapor Phase Homoepitaxial Regrowth," Advanced Materials, DOI: 10.1002/adma.200802138 (2009).
  5. Gu, Zhanjun, Feng Liu, Jane Y. Howe, M. Parans Paranthaman, and Zhengwei Pan, "Three-Dimensional Germanium Oxide Nanowire Networks," Crystal Growth & Design, 9 (1) 35-39 (2009).
  6. Aytug, T., M. Paranthaman, K.J. Leonard, K. Kim, A.O. Ijaduola, E. Tuncer, J.R. Thompson, and D.K. Christen, "Enhanced flux pinning and critical currents in YBa2Cu3O7-? films by nanoparticle surface decoration: Extension to coated conductor templates," J. Applied Physics, 104, 043906 (2008).
  7. Paranthaman, M. P., and Venkat Selvamanickam, "Flux Pinning and AC Loss in Second Generation High Temperature Superconductor Wires," pp. 3-10 in Flux Pinning and AC Loss Studies on YBCO Coated Conductors (book chapter), Eds. M. Parans Paranthaman, and Venkat Selvamanickam, Nova Science Publishers Inc., New York, 2007.
  8. Paranthaman, M.P., S. Sathyamurthy, M.S. Bhuiyan, P.M. Martin, T. Aytug, K. Kim, M. Fayek, K.J. Leonard, J. Li, A. Goyal, T. Kodenkandath, X. Li, W. Zhang, and M.W. Rupich, "MOD buffer/YBCO approach to fabricate low-cost second generation HTS wires," IEEE Trans. On Appl. Supercond., 17 (2), 3332-3335, June 2007.
  9. Sathyamurthy, S.; Kim, K.; Aytug; T.; Paranthaman, M., "Effect of relative humidity on the crystallization of sol-gel lanthanum zirconium oxide films," Chemical Materials, 18, 5829 (2006).
  10. Kang, S.; Goyal, A.; Li, J.; Gapud, A. A.; Martin, P. M.; Heatherly, L.; Thompson, J. R.; Christen, D. K.; List, F. A.; Paranthaman, M.; Lee, D. F.; "High-performance high-Tc superconducting wires," Science, 311 (5769), 1911, (March 2006).

 

List of U.S. Patents Issued (21):

  1. M. P. Paranthaman, Tolga Aytug, "Laminated, biaxially textured superconductors include Ir-based buffer layers and/or substrates," U. S. Patent No. 7,432,229 (issued Date: October 7, 2008).
  2. M. Parans Paranthaman, Urs Schoop, Amit Goyal, C.L.H. Thieme, Darren T. Verebelyi, and Martin W. Rupich, "Doped Y2O3 Buffer Layers for Laminated Conductors," U. S. Patent No. 7,258,928 B2 (issued Date: August 21, 2007).
  3. M. Parans Paranthaman, T. Aytug, and D.K. Christen, "Method of depositing an electrically conductive oxide buffer layer on a textured substrate and articles formed therefrom," U.S. Patent No. 6,956,012 (issued Date: October 18, 2005).
  4. M.P. Paranthaman, T. Aytug, D.K. Christen, R. Feenstra, and A. Goyal, "Buffer layers and articles for electronic devices," U.S. Patent No. 6,764,770 (issued Date: July 20, 2004).
  5. M. Parans Paranthaman, T. Aytug, and D.K. Christen, "Method of depositing an electrically conductive oxide buffer layer on a textured substrate and articles formed therefrom," U.S. Patent No. 6,617,283 (issued Date: September 9, 2003).
  6. D.B. Beach, J.S. Morrell, M. Paranthaman, T. Chirayil, E.D. Specht, and A. Goyal, "Laminate articles on biaxially textured metal substrates," U.S. Patent No. 6,663,976 (issued Date: December 16, 2003).
  7. R.K. Williams, M. Paranthaman, T.G. Chirayil, D.F. Lee, A. Goyal, and R. Feenstra, "Laminate Article," U.S. Patent No. 6,399,154 (Issued Date: June 4, 2002).
  8. D.B. Beach, J.S. Morrell, M. Paranthaman, T.G. Chirayil, E.D. Specht, and A. Goyal, "Method of Depositing Buffer Layers on Biaxially Textured Metal Substrates," U.S. Patent No. 6,440,211 (Issued Date: August 27, 2002).
  9. A. Goyal, D.M. Kroeger, M. Paranthaman, D.F. Lee, R. Feenstra, and D.P. Norton, "Method of depositing a protective layer over a biaxially textured alloy substrate and composition therefrom," U.S. Patent No. 6,451,450 (Issued Date: September 17, 2002).
  10. M. Paranthaman, A. Goyal, D.M. Kroeger, and F.A. List, "Method of making MgO buffer layers on rolled nickel or copper as superconductor substrates," U.S. Patent No. 6,468,591 (Issued Date: October 22, 2002).
  11. S.S. Shoup, M. Paranthaman, D.B. Beach, D.M. Kroeger, and A. Goyal, "Buffer Layers on Biaxially Textured Metal Substrates," U.S. Patent No. 6,235,402 (Issued Date: May 22, 2001).
  12. M. Paranthaman, A. Goyal, D.M. Kroeger, and F.A. List, III, "MgO buffer layers on rolled nickel or copper as superconductor substrates," U.S. Patent No. 6,261,704 (Issued Date: July 17, 2001).
  13. R.K. Williams, M. Paranthaman, T.G. Chirayil, D.F. Lee, A. Goyal, and R. Feenstra, "Rare Earth Zirconium Oxide Buffer Layers on Metal Substrate," U.S. Patent No. 6,270,908 (Issued Date: August 7, 2001).
  14. S.S. Shoup, M. Paranthaman, D.B. Beach, D.M. Kroeger, and A. Goyal, "Sol-gel Deposition of Buffer Layers on Biaxially Textured Metal Substances," U.S. Patent No. 6,077,344 (Issued Date: June 20, 2000).
  15. A. Goyal, E.D. Specht, D.M. Kroeger, M. Paranthaman, "Method of forming Biaxially Textured Alloy Substrates and Devices thereon," U.S. Patent No. 6,106,615 (Issued Date: August 22, 2000).
  16. M. Paranthaman, D.F. Lee, D.M. Kroeger, and A. Goyal, "Buffer Layers on Rolled Nickel or Copper as Superconductor Substrates," U.S. Patent No. 6,150,034 (Issued Date: November 21, 2000).
  17. M. Paranthaman, D.F. Lee, D.M. Kroeger, and A. Goyal, "Buffer Layers on Metal Surfaces Having Biaxial Texture as Superconductor Substrates," U.S. Patent No. 6,156,376 (Issued Date: December 5, 2000).
  18. M. Paranthaman, D.F. Lee, D.M. Kroeger, and A. Goyal, "Buffer Layers on Metal Surfaces Having Biaxial Texture as Superconductor Substrates," U.S. Patent No. 6,159,610 (Issued Date: December 12, 2000).
  19. A. Goyal, E. D. Specht, D. M. Kroeger, and M. Paranthaman, "Method of forming Biaxially Textured Alloy Substrates and Devices thereon," U.S. Patent No. 5,964,966 (Issued Date: October 12, 1999).
  20. J.D. Budai, D.K. Christen, A. Goyal, Q. He, D. M. Kroeger, D. F. Lee, F. A. List III, D. P. Norton, M. Paranthaman, B. C. Sales, and E. D. Specht, "High Tc YBCO Superconductor deposited on Biaxially Textured Ni Substrate," U.S. Patent No. 5,968, 877 (Issued Date: October 19, 1999).
  21. R. Feenstra, D. K. Christen, and M. Paranthaman, "Method for making High-Critical Current-density YBa2Cu3O7 Superconducting layers on Metallic Substrates," U.S. Patent No. 5,972,847 (Issued Date: October 26, 1999).

Materials Chemistry Group Staff

 Provided by Oak Ridge National Laboratory's Chemical Sciences Division 
Rev: March 2009